1. Field of the Invention
The present invention relates to a method of checking a wirebond condition. In particular, the present invention relates to a method of checking a wirebond condition that is advantageously used for determining whether or not a metal wire is properly fixed to an object such as a semiconductor chip or a lead terminal.
2. Description of the Related Art
An example of the conventionally well-known wire-bonding techniques for electrically connecting two elements (such as a semiconductor chip and a lead) is a ball-bonding method. A typical ball-bonding operation using a bonding tool called "capillary" may be performed in the following manner.
First, a lower tip of a metal wire extending vertically through a bonding tool is melted into a ball. Then, the bonding tool is lowered toward a semiconductor chip to bring the ball-like end of the wire into contact with the semiconductor chip. Under a predetermined squeezing force, the ball-like end of the wire will be deformed between the bonding tool and the semiconductor chip. In this state, ultrasonic vibrations are applied to the bonding tool for a certain period of time. As a result, the lower end of the wire will be fixed to the semiconductor chip.
Though having many advantages, the conventional wire-bonding technique is disadvantageous in the following points.
It is now assumed that the semiconductor chip is mounted on a center pad (called "island") of a metal lead frame which in turn is carried by a flat supporting base. In such an instance, if the lead frame is not flat but warped, the central pad together with the semiconductor chip may be raised above the supporting base. When a wire-bonding operation is performed to such a raised semiconductor chip, the wire may fail to be firmly attached to the semiconductor chip.
Conventionally, the checking of wirebond condition is performed after a wire-bonding operation (that is, the wirebond condition checking is additionally performed separately from the wire-bonding operation). In this manner, however, the overall process for producing semiconductor devices tends to become time-consuming. Further, in practice, all of the semiconductor devices in the making are not subjected to the checking of wirebond condition (i.e., only arbitrarily selected ones are examined). Thus, conventionally, a certain number of defective semiconductor devices may disadvantageously be subjected to a second wire-bonding operation (or any other subsequent procedure) together with non-defective semiconductor devices.